This section is intended to merely provide background for the invention and is not prior art to the claims.
Serial flash memories use different instructions and operate in different manners, depending on manufacturers. In order for technology standardization, the Joint Electronic Device Engineering Council (JEDEC) has been standardizing the serial flash memories (JEDEC Standard No. 216: Serial Flash Discoverable Parameters (SFDP)).
In the SFDP, a header, a parameter header, a basic parameter table, a sector map parameter table, and a basic instruction table are configured to form a tree structure. The header and the parameter header include information regarding the tables. The basis parameter table, the sector map parameter table, and the basic instruction table include information regarding the serial flash memories. In order to acquire such information about the memory, a 3-stage search process is needed, causing a time delay during the search process.
In the SFDP, functions of the memory are either supported with restrictions or not supported at all. For example, in order to restrict a write function, the SFDP only supports a block protection function while not supporting a persistent protection function and a dynamic protection function at all. Accordingly, integrated information for supporting various functions of the memory is required.
In addition, the SFDP does not consider performance of each memory. For example, a bus access mode of the memory has a different speed limit for each mode, and the SFDP does not consider the difference and is set to operate at a low speed. Accordingly, integrated information for properly using the performance of the memory is required.
Actually, because manufacturers produce models that support the SFDP together with models that do not support the SFDP, integrated management of the additional information apart from the information defined in the SFDP is required.
A memory management method and apparatus to solve the above-described problems have not been implemented yet.